AD9228BCPZRL-65中文资料亚德诺数据手册PDF规格书

GENERAL DESCRIPTION

The AD9228 is a quad, 12-bit, 40/65 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 65 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.

FEATURES

4 ADCs integrated into 1 package

119 mW ADC power per channel at 65 MSPS

SNR = 70 dB (to Nyquist)

ENOB = 11.3 bits

SFDR = 82 dBc (to Nyquist)

Excellent linearity

DNL = ±0.3 LSB (typical)

INL = ±0.4 LSB (typical)

Serial LVDS (ANSI-644, default)

Low power, reduced signal option (similar to IEEE 1596.3)

Data and frame clock outputs

315 MHz full-power analog bandwidth

2 V p-p input voltage range

1.8 V supply operation

Serial port control

Full-chip and individual-channel power-down modes

Flexible bit orientation

Built-in and custom digital test pattern generation

Programmable clock and data alignment

Programmable output resolution

Standby mode

APPLICATIONS

Medical imaging and nondestructive ultrasound

Portable ultrasound and digital beam-forming systems

Quadrature radio receivers

Diversity radio receivers

Tape drives

Optical networking

Test equipment