AD835RF/IF射频/中频RFID的射频放大器规格书PDF中文资料

AD835属于RF/IF射频/中频RFID的射频放大器。由亚德诺半导体技术有限公司制造生产的AD835射频放大器在射频应用中，射频放大器产品可用于信号增益和缓冲。这些产品与通用运算放大器的不同之处在于，它们通常适用于更高的频率，更倾向于提供不可调节的固定增益，并且输入或输出阻抗值符合常用传输线特性阻抗。

GENERAL DESCRIPTION

The AD835 is a complete four-quadrant, voltage output analog multiplier, fabricated on an advanced dielectrically isolated complementary bipolar process. It generates the linear product of its X and Y voltage inputs with a −3 dB output bandwidth of 250 MHz (a small signal rise time of 1 ns). Full-scale (−1 V to +1 V) rise to fall times are 2.5 ns (with a standard RL of 150 Ω), and the settling time to 0.1 under the same conditions is typically 20 ns.

Its differential multiplication inputs (X, Y) and its summing input (Z) are at high impedance. The low impedance output voltage (W) can provide up to ±2.5 V and drive loads as low as 25 Ω. Normal operation is from ±5 V supplies.

Though providing state-of-the-art speed, the AD835 is simple to use and versatile. For example, as well as permitting the addition of a signal at the output, the Z input provides the means to operate the AD835 with voltage gains up to about ×10. In this capacity, the very low product noise of this multiplier (50 nV/√Hz) makes it much more useful than earlier products.

The AD835 is available in an 8-lead PDIP package (N) and an 8-lead SOIC package (R) and is specified to operate over the −40°C to +85°C industrial temperature range.

FEATURES

Simple: basic function is W = XY + Z

Complete: minimal external components required

Very fast: Settles to 0.1 of full scale (FS) in 20 ns

DC-coupled voltage output simplifies use

High differential input impedance X, Y, and Z inputs

Low multiplier noise: 50 nV/√Hz

APPLICATIONS

Very fast multiplication, division, squaring

Wideband modulation and demodulation

Phase detection and measurement

Sinusoidal frequency doubling

Video gain control and keying

Voltage-controlled amplifiers and filters