1 MSPS, Ultralow Power, 12-Bit ADC in 8-Lead LFCSP

GENERAL DESCRIPTION The AD7091 is a 12-bit successive approximation register analog-to-digital converter (SAR ADC) that offers ultralow power consumption (typically 367 µA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). The AD7091 operates from a single 2.09

文件：448.45 Kbytes 页数：20 Pages

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1 MSPS、超低功耗、12位ADC，采用8引脚LFCSP封装

AD7091是一款12位逐次逼近寄存器模数转换器(SAR ADC)，可在高吞吐速率（50 MHz SCLK时为1 MSPS）下实现超低功耗（3 V和1 MSPS时典型值为367 µA）。.AD7091采用2.09 V至5.25 V单电源供电。它还具有一个片内转换时钟和高速串行接口。\n\n 转换过程与数据采集利用 CONVST信号和内部振荡器进行控制。AD7091在实现1 MSPS吞吐速率的同时，可以利用其串行接口在转换完成后读取数据。AD7091采用先进的设计和工艺技术，可在高吞吐速率下实现极低的功耗。\n\n 基准电压从VDD获得，从而为ADC提供最宽的动态输入范围；因 • 高吞吐速率：1 MSPS \n\n• 额定电压(VDD )：2.09 V至5.25 V \n\n• 积分非线性(INL)：±1 LSB（最大值）\n\n• 模拟输入范围：0 V至 VDD\n\n• 超低功耗\n 3 V及1 MSPS下典型值为367 μA\n 3 V关断模式下典型值为324nA \n\n• 基准电压由VDD提供;

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1 MSPS, Ultralow Power, 12-Bit ADC in 8-Lead LFCSP

GENERAL DESCRIPTION The AD7091 is a 12-bit successive approximation register analog-to-digital converter (SAR ADC) that offers ultralow power consumption (typically 367 µA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). The AD7091 operates from a single 2.09

文件：448.45 Kbytes 页数：20 Pages

AD

亚德诺

1 MSPS, Ultralow Power, 12-Bit ADC in 8-Lead LFCSP

GENERAL DESCRIPTION The AD7091 is a 12-bit successive approximation register analog-to-digital converter (SAR ADC) that offers ultralow power consumption (typically 367 µA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). The AD7091 operates from a single 2.09

文件：448.45 Kbytes 页数：20 Pages

AD

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1 MSPS, Ultralow Power, 12-Bit ADC in 10-Lead LFCSP and MSOP

GENERAL DESCRIPTION The AD7091R is a 12-bit successive approximation analog-to-digital converter (ADC) that offers ultralow power consumption (typically 349 µA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). Operating from a single 2.7 V to 5.25 V power suppl

文件：454.89 Kbytes 页数：20 Pages

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1 MSPS, Ultralow Power, 12-Bit ADC in 10-Lead LFCSP and MSOP

GENERAL DESCRIPTION The AD7091R is a 12-bit successive approximation analog-to-digital converter (ADC) that offers ultralow power consumption (typically 349 µA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). Operating from a single 2.7 V to 5.25 V power suppl

文件：454.89 Kbytes 页数：20 Pages

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2-/4-/8-Channel, 1 MSPS, Ultralow Power, 12-Bit SAR ADC

GENERAL DESCRIPTION The AD7091R-2/AD7091R-4/AD7091R-8 family is a multichannel 12-bit, ultralow power, successive approximation analog-to-digital converter (ADC) that is available in two, four, or eight analog input channel options. The AD7091R-2/AD7091R-4/AD7091R-8 operate from a single 2.7 V to

文件：861.82 Kbytes 页数：42 Pages

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2-/4-/8-Channel, 1 MSPS, Ultralow Power, 12-Bit SAR ADC

FEATURES ► Ultralow system power ► Flexible power/throughput rate management ► Normal mode ► 1.4 mW at 1 MSPS ► Power-down mode ► 550 nA typical at VDD = 5.25 V ► 435 nA typical at VDD = 3 V ► Programmable ALERT interrupt pin (4-/8-channel models) ► High performance ► 1 MSPS throughput w

文件：1.85315 Mbytes 页数：39 Pages

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2-/4-/8-Channel, 1 MSPS, Ultralow Power, 12-Bit SAR ADC

FEATURES ► Ultralow system power ► Flexible power/throughput rate management ► Normal mode ► 1.4 mW at 1 MSPS ► Power-down mode ► 550 nA typical at VDD = 5.25 V ► 435 nA typical at VDD = 3 V ► Programmable ALERT interrupt pin (4-/8-channel models) ► High performance ► 1 MSPS throughput w

文件：1.85315 Mbytes 页数：39 Pages

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2-/4-/8-Channel, 1 MSPS, Ultralow Power, 12-Bit SAR ADC

FEATURES ► Ultralow system power ► Flexible power/throughput rate management ► Normal mode ► 1.4 mW at 1 MSPS ► Power-down mode ► 550 nA typical at VDD = 5.25 V ► 435 nA typical at VDD = 3 V ► Programmable ALERT interrupt pin (4-/8-channel models) ► High performance ► 1 MSPS throughput w

文件：1.85315 Mbytes 页数：39 Pages

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