AD6620AS集成电路（IC）的专用规格书PDF中文资料

AD6620AS属于集成电路（IC）的专用。由亚德诺半导体技术有限公司制造生产的AD6620AS专用该系列产品可提供所需的功能，用以将信息源/信宿连到各种复杂或范围狭窄应用中的传感器、变送器、致动器、传输介质或其他此类端点。例如，汽车安全气囊驱动器、车身控制和信息娱乐总线、自适应电缆均衡器、智能卡等等。

GENERAL DESCRIPTION

The AD6620 is a digital receiver with four cascaded signal-processing elements: a frequency translator, two fixed-coefficient decimating filters, and a programmable coefficient decimating filter. All inputs are 3.3 V LVCMOS compatible. All outputs are LVCMOS and 5 V TTL compatible.

FEATURES

High Input Sample Rate

67 MSPS Single Channel Real

33.5 MSPS Diversity Channel Real

33.5 MSPS Single Channel Complex

NCO Frequency Translation

Worst Spur Better than –100 dBc

Tuning Resolution Better than 0.02 Hz

2nd Order Cascaded Integrator Comb FIR Filter

Linear Phase, Fixed Coefficients

Programmable Decimation Rates: 2, 3 . . . 16

5th Order Cascaded Integrator Comb FIR Filter

Linear Phase, Fixed Coefficients

Programmable Decimation Rates: 1, 2, 3 . . . 32

Programmable Decimating RAM Coefficient FIR Filter

Up to 134 Million Taps per Second

256 20-Bit Programmable Coefficients

Programmable Decimation Rates: 1, 2, 3 . . . 32

Bidirectional Synchronization Circuitry

Phase Aligns NCOs

Synchronizes Data Output Clocks

Serial or Parallel Baseband Outputs

Pin Selectable Serial or Parallel

Serial Works with SHARC®, ADSP-21xx, Most Other DSPs

16-Bit Parallel Port, Interleaved I and Q Outputs

Two Separate Control and Configuration Ports

Generic μP Port, Serial Port

3.3 V Optimized CMOS Process

JTAG Boundary Scan