32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical) ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings ► Current saving duty cycle ratio: 1/4 or 1/16 ►

文件：3.7831 Mbytes 页数：107 Pages

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32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical) ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings ► Current saving duty cycle ratio: 1/4 or 1/16 ►

文件：3.76859 Mbytes 页数：110 Pages

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32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

The AD4129-4 is an ultra-low power, high precision, and measurementsolution for low bandwidth battery-operated applications. Thefully integrated analog front end (AFE) includes a multiplexer forup to 8 single-ended or 4 differential inputs, programmable gainamplifier (PGA), 16-bit sigma-delta (Σ-Δ) Ultra-low current consumption (typical)\n 32 μA: continuous conversion mode (gain = 128)\n 5 μA: duty cycling mode (ratio = 1/16)\n 0.5 μA: standby mode\n 0.1 μA: power-down mode\nBuilt-in features for system level power savings\n Current saving duty cycle ratio: 1/4 or 1/16\n Smart sequencer and pe;

ADI

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32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical) ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings ► Current saving duty cycle ratio: 1/4 or 1/16 ►

文件：3.76859 Mbytes 页数：110 Pages

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亚德诺

32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical) ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings ► Current saving duty cycle ratio: 1/4 or 1/16 ►

文件：3.76859 Mbytes 页数：110 Pages

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亚德诺

32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical) ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings ► Current saving duty cycle ratio: 1/4 or 1/16 ►

文件：3.76859 Mbytes 页数：110 Pages

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亚德诺

32 μA, Ultra-Low Power, 16-Bit Sigma-Delta ADC with Integrated PGA and FIFO

FEATURES ► Ultra-low current consumption (typical) ► 32 μA: continuous conversion mode (gain = 128) ► 5 μA: duty cycling mode (ratio = 1/16) ► 0.5 μA: standby mode ► 0.1 μA: power-down mode ► Built-in features for system level power savings ► Current saving duty cycle ratio: 1/4 or 1/16 ►

文件：3.7831 Mbytes 页数：107 Pages

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