24-Bit, 2 MSPS/500 kSPS, SAR ADCs

GENERAL DESCRIPTION The AD4030-24/AD4032-24 are 2 MSPS or 500 kSPS successive approximation register (SAR), analog-to-digital converters (ADC) with Easy Drive™. With a guaranteed maximum ±0.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24/ AD4032-24 achieve unp

文件：2.41379 Mbytes 页数：50 Pages

AD

亚德诺

24位、500 kSPS、SAR ADC

AD4030-24/AD4032-24是2 MSPS或500 kSPS逐次逼近寄存器(SAR)模数转换器(ADC)，具有Easy Drive™特性。AD4030-24/AD4032-24具有保证最大±0.9 ppm的积分非线性(INL)和24位无失码，在−40°C至+125°C时可实现出色的精度。图1显示了AD4030-24/AD4032-24的功能架构。\n\n 低漂移、内部精密基准电压源缓冲器简化了与其他系统电路的基准电压共用。使用5V基准电压源时，AD4030-24/AD4032-24提供109 dB的典型动态范围。低噪底支持需要较小增益和较低功耗的信号链。具有可编程抽取率的模 • 高性能\n• 吞吐速率：2个MSPS (AD4030-24)或500 kSPS (AD4032-24)选项\n\n• INL：±0.9 ppm（最大值，−40°C至+125°C）\n\n• SNR：108.4 dB（典型值）\n\n• THD：-127 dB（典型值）\n\n• NSD：−169 dBFS/Hz（典型值）\n\n\n\n\n• 低功耗\n• 30 mW (2 MSPS)\n\n• 10 mW（500 kSPS时）\n\n• 3 mW（10 kSPS时）\n\n\n\n\n• Easy Drive™ 特性降低了系统复杂性\n• 直流输入具有1.2 μA低输入电流\n\n• 宽;

ADI

亚德诺

24-Bit, 2 MSPS/500 kSPS, SAR ADCs

GENERAL DESCRIPTION The AD4030-24/AD4032-24 are 2 MSPS or 500 kSPS successive approximation register (SAR), analog-to-digital converters (ADC) with Easy Drive™. With a guaranteed maximum ±0.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24/ AD4032-24 achieve unp

文件：2.41379 Mbytes 页数：50 Pages

AD

亚德诺

24-Bit, 2 MSPS/500 kSPS, SAR ADCs

GENERAL DESCRIPTION The AD4030-24/AD4032-24 are 2 MSPS or 500 kSPS successive approximation register (SAR), analog-to-digital converters (ADC) with Easy Drive™. With a guaranteed maximum ±0.9 ppm integral nonlinearity (INL) and no missing codes at 24-bits, the AD4030-24/ AD4032-24 achieve unp

文件：2.41379 Mbytes 页数：50 Pages

AD

亚德诺