4 ADC with PLL, 192 kHz, 24-Bit Codec

GENERAL DESCRIPTION The AD1974 is a high performance, single-chip ADC that provides four analog-to-digital converters (ADCs) with differential inputs using the Analog Devices, Inc. patented multibit sigma-delta (Σ-Δ) architecture. An SPI port is included, allowing a microcontroller to enable mute

文件：492.84 Kbytes 页数：24 Pages

AD

亚德诺

4 ADC with PLL

文件：392.73 Kbytes 页数：24 Pages

AD

亚德诺

四路ADC，内置PLL，192 kHz，24位编解码器

AD1974是一款高性能的单芯片编解码器，采用ADI公司专利的多比特Σ-Δ架构，可提供4个带差分输入的模数转换器（ADC）。内置的SPI 端口使微控制器可以调整音量和许多其它参数。AD1974采用3.3 V数字与模拟电源供电，48引脚（单端输出）LQFP封装。\n\n AD1974在系统和电路架构上都针对低电磁干扰（EMI）而设计。AD1974利用内置PLL驱动LR时钟或外部晶振的主时钟，从而无需单独的高频主时钟，而且可与抑制位时钟配合使用。ADC采用ADI公司最新的连续时间架构进行设计，进一步减小了电磁干扰。AD1974采用3.3 V电源供电，实现了较低功耗，进一步降低了电磁辐射。 • PLL生成或直接主时钟\n\n• 低EMI设计\n\n• 动态范围与SNR：107 dB \n\n• THD + N ：−94 dB\n\n• 单电源电压：3.3 V \n\n• 5 V逻辑输入容限;

ADI

亚德诺

4 ADC with PLL, 192 kHz, 24-Bit Codec

GENERAL DESCRIPTION The AD1974 is a high performance, single-chip ADC that provides four analog-to-digital converters (ADCs) with differential inputs using the Analog Devices, Inc. patented multibit sigma-delta (Σ-Δ) architecture. An SPI port is included, allowing a microcontroller to enable mute

文件：492.84 Kbytes 页数：24 Pages

AD

亚德诺

4 ADC with PLL, 192 kHz, 24-Bit Codec

GENERAL DESCRIPTION The AD1974 is a high performance, single-chip ADC that provides four analog-to-digital converters (ADCs) with differential inputs using the Analog Devices, Inc. patented multibit sigma-delta (Σ-Δ) architecture. An SPI port is included, allowing a microcontroller to enable mute

文件：492.84 Kbytes 页数：24 Pages

AD

亚德诺

4 ADC with PLL

文件：392.73 Kbytes 页数：24 Pages

AD

亚德诺

4 ADC with PLL

文件：392.73 Kbytes 页数：24 Pages

AD

亚德诺

4 ADC with PLL

文件：392.73 Kbytes 页数：24 Pages

AD

亚德诺

4 ADC with PLL

文件：392.73 Kbytes 页数：24 Pages

AD

亚德诺

4 ADC with PLL

文件：392.73 Kbytes 页数：24 Pages

AD

亚德诺