AD1864数据手册ADI中文资料规格书

描述 Description

The AD1864 is a complete dual 18-bit DAC offering excellentTHD+N, while requiring no external components. Two completesignal channels are included. This results in cophasedvoltage or current output signals and eliminates the need foroutput demultiplexing circuitry. The monolithic AD1864 chipincludes CMOS logic elements, bipolar and MOS linearelements and laser-trimmed thin-film resistor elements, allfabricated on Analog Devices BiMOS II process.The DACs on the AD1864 chip employ a partially-segmentedarchitecture. The first four MSBs of each DAC are segmentedinto 15 elements. The 14 LSBs are produced using standardR-2R techniques. Segment and R-2R resistors are laser-trimmedto provide extremely low total harmonic distortion.This architecture minimizes errors at major code transitionsresulting in low output glitch and eliminating the need for anexternal deglitcher. When used in the current output mode, theAD1864 provides two cophased ±1 mA output signals.Each channel is equipped with a high performance outputamplifier. These amplifiers achieve fast settling and high slewrate, producing ±3 V signals at load currents up to 8 mA. Eachoutput amplifier is short-circuit protected and can withstandindefinite short circuits to ground.The AD1864 was designed to balance two sets of opposingrequirements, channel separation and DAC matching. Highchannel separation is the result of careful layout techniques. Atthe same time, both channels of the AD1864 have been designedto ensure matched gain and linearity as well as tracking over timeand temperature. This assures optimum performance when used instereo and multi-DAC per channel applications.A versatile digital interface allows the AD1864 to be directlyconnected to standard digital filter chips. This interface employsfive signals: Data Left (DL), Data Right (DR), Latch Left (LL),Latch Right (LR) and Clock (CLK). DL and DR are the serialinput pins for the left and right DAC input registers. Input databits are clocked into the input register on the rising edge ofCLK. A low going latch edge updates the respective DACoutput. For systems using only a single latch signal, LL and LRmay be connected together. For systems using only one DATAsignal, DR and DL may be connected together.The AD1864 operates from ±5 V to ±12 V power supplies. Thedigital supplies, VL and ­VL, can be separated from the analogsupplies, VS and ­VS, for reduced digital feedthrough. Separateanalog and digital ground pins are also provided. The AD1864typically dissipates only 225 mW, with a maximum powerdissipation of 265 mW.The AD1864 is packaged in both a 24-pin plastic DIP and a28-pin PLCC. Operation is guaranteed over the temperaturerange of ­25°C to +70°C and over the voltage supply range of±4.75 V to ±13.2 V.