ACTS161MS中文资料CMOS 4-Bit Synchronous Counter数据手册Renesas规格书

描述 Description

The Intersil ACTS161MS is a Radiation Hardened 4-Bit Binary Synchronous Counter, featuring asynchronous reset and load ahead carry logic. The MR is an active low master reset. SPE is an active low Synchronous Parallel Enable which disables counting and allows data at the preset inputs (P0 - P3) to load the counter. CP is the positive edge clock. TC is the terminal count or carry output. Both TE and PE must be high for counting to occur, but are irrelevant to loading. TE low will keep TC low.
The ACTS161MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of a radiation hardened, high-speed, CMOS/SOS Logic family.
The ACTS161MS is supplied in a 16 lead Ceramic Flatpack (K suffix) or a Ceramic Dual-In-Line Package (D suffix).

特性 Features

• Devices QML Qualified in Accordance with MIL-PRF-38535
• 1.25 Micron Radiation Hardened SOS CMOS
• Single Event Upset (SEU) Immunity: -10 Errors/Bit/Day (Typ)
• Dose Rate Upset >1011 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Significant Power Reduction Compared to ALSTTL Logic
• Input Logic Levels
• VIH = VCC/2 Min
• Fast Propagation Delay 25ns (Max), 16ns (Typ)