ACS8522A数据手册Semtech中文资料规格书

特性 Features

·Suitable for Stratum 3, 4E, 4 and SONET Minimum Clock (SMC) or SONET/SDH Equipment Clock (SEC)applications (to Telcordia 1244-CORE[19] Stratum 3 and GR-253[17], and ITU-T G.813[11] Options Ι and ΙΙ specifications).
·Accepts four individual input reference clocks, all with robust input clock source quality monitoring.
·Simultaneously generates four output clocks, plus two Sync pulse outputs.
·Absolute Holdover accuracy better than 3 x 10-10 (manual), 7.5 x 10-14 (instantaneous); Holdover stability defined by choice of external XO.
·Programmable PLL bandwidth, for wander and jitter tracking/attenuation, 0.1 Hz to 70 Hz in 10 steps.
·Automatic hit-less source switchover on loss of input
·Serial SPI compatible interface.
·Output phase adjustment in 6 ps steps up to ±200 ns
·IEEE 1149.1[5] JTAG Boundary Scan.
·Available in LQFP 64-pin package.
·Single 3.3 V operation.
·Lead (Pb)-free version available (ACS8522AT), RoHS and WEEE compliant.