AC108数据手册power中文资料规格书

描述 Description

AC108 is a highly integrated quad-channel ADC with I2S/TDM output transition . It's designed for multi-microphone array in high definition voice capture and recognition application platforms.
The integrated digital PLL supports a large range of input/output frequencies, and It can generate required system clocks from common reference clock such as 6-/12-MHz, 6.144-/12.288-MHz, 5.6448-/11.2896-MHz, 13MHz and 19.2MHz. The audio sample 8kHz, 12kHz,16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz, 96kHz is supported.
AC108 integrates four synchronized ADCs with independent programmable mic bias voltage and mic boost amplifier to deliver valid channel data that channel crosstalk can be eliminated. The analog input port MIC1P/N ~MIC4P/N is designed as four differential microphone pin or single-ended line-in pin.Two smart digital mic interfaces are supported to make low jitter clock output and decimation filter for up to four digital mic. Independent digital voice controllers are provided in each channel.
AC108 can transit its four channels output data over two I2S ports by standard I2S or PCM format, also a single port by TDM format. A new format called encoding mode can also used to transit four channel data when the I2S format of AP is normal protocol types. Furthermore, one to four device can be combined to transit up to 16 channels output data by a single TDM line.
The device includes several DSP features such as high-pass filter, mixer, and volume control.
It is available in a 48-pin 6mm*6mm  QFN package.

特性 Features

·108 dB dynamic range (A-weighted) @ 0 dB boost gain\r
·–90 dB THD+N @ 0 dB boost gain\r
·4 programmable boost amplifiers with 0dB to 45dB in 3dB step\r
·ADC sample rates supported: 8kHz,12kHz,16kHz, 22.05kHz, 24kHz, 32kHz,44.1kHz, 48kHz,96kHz\r
·Analog mixer and digital mixer in record data path\r
·Four fully differential microphone inputs: MIC1P/N ~MIC4P/N\r
- Can be configured as pseudo differential, single-ended mode\r
- Can be configured as digital MIC data pin\r
·Four low noise mic bias outputs: MIC1_BIAS~MIC4_BIAS\r
- Programmable bias voltage 1.5V to 4V\r
·Two DMIC SCLK output@1M~3.25M\r
·Two I2S data output:\r
- Can be configured as I2S/PCM format using 1 pins to output 2 channel data of 1 devices.\r
- Can be configured as I2S/PCM format using 2 pins to output 4 channel data of 1 devices.\r
- Can be configured as TDM format using 1 pins to output 4 even 16 channel data of 4 devices.\r
- Can be configured as Encoding format using 1 pins to output 4 even 16 channel data of 4 devices.\r
·DPLL support a wide input for 6-/12-MHz, 6.144-/12.288-MHz,5.6448-/11.2896-MHz, 13MHz and 19.2MHz.\r
·Integrated LDO allowing single 3.3V supply\r
·<4mA per ADC channel for low power consumption application\r
·TWI control interface support from 100 kHz up to 400 kHz\r
·48 pin , 6×6 mm2 QFN Package

应用 Application

·Audio Capture in Voice Interactive Product \r
·Audio  Capture  in  Voice  Communication  System