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A6810ELW集成电路(IC)的配电开关负载驱动器规格书PDF中文资料

A6810ELW
厂商型号

A6810ELW

参数属性

A6810ELW 封装/外壳为20-SOIC(0.295",7.50mm 宽);包装为卷带(TR);类别为集成电路(IC)的配电开关负载驱动器;产品描述:IC PWR DRVR BIPOLAR 1:10 20SOIC

功能描述

DABiC-IV, 10-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
IC PWR DRVR BIPOLAR 1:10 20SOIC

封装外壳

20-SOIC(0.295",7.50mm 宽)

文件大小

150.16 Kbytes

页面数量

8

生产厂商 Allegro MicroSystems
企业简称

ALLEGRO

中文名称

Allegro MicroSystems官网

原厂标识
数据手册

原厂下载下载地址一下载地址二到原厂下载

更新时间

2025-6-24 22:59:00

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A6810ELW规格书详情

The A6809– and A6810– devices combine 10-bit CMOS shift registers, accompanying data latches and control circuitry with bipolar sourcing outputs and pnp active pull downs. Designed primarily to drive vacuum-fluorescent displays, the 60 V and -40 mA output ratings also allow these devices to be used in many other peripheral power driver applications. The A6809– and A6810– feature an increased data input rate (compared with the older UCN/UCQ5810-F) and a controlled output slew rate. The A6809xLW and A6810xLW are identical except for pinout.

The CMOS shift register and latches allow direct interfacing with microprocessor-based systems. With a 3.3 V or 5 V logic supply, typical serial-data input rates are up to 33 MHz.

A CMOS serial data output permits cascade connections in applications requiring additional drive lines. Similar devices are avail-able as the A6811– (12 bits), A6812– (20 bits), and A6818– (32 bits). The A6809– and A6810– output source drivers are npn Darling tons, capable of sourcing up to 40 mA. The controlled output slew rate reduces electromagnetic noise, which is an important consideration in systems that include telecommunications and/or microprocessors and to meet government emissions regulations. For inter-digit blanking, all output drivers can be disabled and all sink drivers turned on with a BLANKING input high. The pnp active pull-downs will sink at least 2.5 mA.

All devices are available in two temperature ranges for optimum performance in commercial (suffix S-) or industrial (suffix E-) applications. The A6810– is provided in three package styles for through-hole DIP (suffix -A), surface-mount SOIC (suffix -LW), or minimum-area surface-mount PLCC (suffix -EP). The A6809– is provided in the SOIC (suffix -LW) only. Copper lead frames, low logic-power dissipation, and low output-saturation voltages allow all devices to source 25 mA from all outputs continuously over the maximum operating temperature range.

FEATURES

■ Controlled Output Slew Rate

■ High-Speed Data Storage

■ 60 V Minimum Output Breakdown

■ High Data Input Rate

■ PNP Active Pull-Downs

■ Low Output-Saturation Voltages

■ Low-Power CMOS Logic and Latches

■ Improved Replacements

for TL4810–, UCN5810–, and UCQ5810–

产品属性

更多
  • 产品编号:

    A6810ELW

  • 制造商:

    Allegro MicroSystems

  • 类别:

    集成电路(IC) > 配电开关,负载驱动器

  • 包装:

    卷带(TR)

  • 开关类型:

    闩锁驱动器

  • 输出数:

    10

  • 比率 - 输入:

    1:10

  • 输出配置:

    高端

  • 输出类型:

    双极性

  • 接口:

    并联,串行

  • 电压 - 负载:

    60V(最大)

  • 电压 - 供电 (Vcc/Vdd):

    3V ~ 5.5V

  • 电流 - 输出(最大值):

    40mA

  • 输入类型:

    非反相

  • 工作温度:

    -40°C ~ 85°C(TA)

  • 安装类型:

    表面贴装型

  • 供应商器件封装:

    20-SOIC

  • 封装/外壳:

    20-SOIC(0.295",7.50mm 宽)

  • 描述:

    IC PWR DRVR BIPOLAR 1

供应商 型号 品牌 批号 封装 库存 备注 价格
ALLEGRO/雅丽高
24+
NA/
359
优势代理渠道,原装正品,可全系列订货开增值税票
询价
ALLEGRO/雅丽高
25+
SOP20
54658
百分百原装现货 实单必成
询价
ALLEGRO/雅丽高
22+
SOP20
100000
代理渠道/只做原装/可含税
询价
ALLEGRO
21+
SOP-20
1341
只做原装正品,不止网上数量,欢迎电话微信查询!
询价
ALLEGRO/雅丽高
25+
25000
原厂原包 深圳现货 主打品牌 假一赔百 可开票!
询价
ALLEGRO/雅丽高
1922+
SOP-20
6852
只做原装正品现货!或订货假一赔十!
询价
ALLEGRO
24+
SOP20
5650
公司原厂原装现货假一罚十!特价出售!强势库存!
询价
ALLEGRO/雅丽高
21+
SOP-20
7500
只做原装所有货源可以追溯原厂
询价
ALLEGRO/雅丽高
23+
SOP20
5000
一站式BOM配单
询价
22+
5000
询价