A14100A数据手册集成电路（IC）的FPGA（现场可编程门阵列）规格书PDF

描述 Description

Microsemi’s ACT 3 Accelerator Series of FPGAs offers the industry’s fastest high-capacity programmable logic device. ACT 3 FPGAs offer a high performance, PCI compliant programmable solution capable of 186 MHz on-chip performance and 9.0 nanosecond clock-to-output (–1 speed grade), with capacities spanning from 1,500 to 10,000 gate array equivalent gates.\r
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The ACT 3 family builds on the proven two-module architecture consisting of combinatorial and sequential logic modules used in Microsemi’s 3200DX and 1200XL families. In addition, the ACT 3 I/O modules contain registers which deliver 9.0 nanosecond clock-to-out times (–1 speed grade). The devices contain four clock distribution networks, including dedicated array and I/O clocks, supporting very fast synchronous and asynchronous designs. In addition, routed clocks can be used to drive high fanout signals such as flip-flop resets and output.\r
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The ACT 3 family is supported by Microsemi’s Designer Series Development System which offers automatic placement and routing (with automatic or fixed pin assignments), static timing analysis, user programming, and debug and diagnostic probe capabilities.

特性 Features

• Up to 10,000 Gate Array Equivalent Gates (up to 25,000 equivalent PLD Gates)\r
• Highly Predictable Performance with 100% Automatic Placeand-Route\r
• As Low as 9.0 ns Clock-to-Output Times (–1 Speed Grade)\r
• Up to 186 MHz On-Chip Performance (–1 Speed Grade)\r
• Up to 228 User-Programmable I/O Pins\r
• Four Fast, Low-Skew Clock Networks\r
• More than 500 Macro Functions\r
• Replaces up to Twenty 32 Macro-Cell CPLDs\r
• Replaces up to One Hundred 20-Pin PAL® Packages\r
• Up to 1,153 Dedicated Flip-Flops\r
• VQFP, TQFP, BGA, and PQFP Packages\r
• Nonvolatile, User Programmable\r
• Fully Tested Prior to Shipment\r
• 5.0 V and 3.3 V Versions\r
• Optimized for Logic Synthesis Methodologies\r
• Low Power CMOS Technology