9DB803DGLF集成电路（IC）的应用特定时钟/定时规格书PDF中文资料

Output Features

• 8 - 0.7V current-mode differential output pairs

• Supports zero delay buffer mode and fanout mode

• Bandwidth programming available

• 50-100 MHz operation in PLL mode

• 50-400 MHz operation in Bypass mode

Features/Benefits

• Spread spectrum modulation tolerant, 0 to -0.5 down

spread and +/- 0.25 center spread

• Supports undriven differential outputs in PD# and

SRC_STOP# modes for power management

Key Specifications

• Outputs cycle-cycle jitter < 50ps

• Output to Output skew <50ps

• Phase jitter: PCIe Gen1 < 86ps peak to peak

• Phase jitter: PCIe Gen2