952906中文资料Programmable Timing Control Hub™ for Next Gen P4™ processor数据手册Renesas规格书

描述 Description

IDT952906A is a 48 pin clock chip for VIA VN800/CN700/P4M800 style chipsets. When used with a fanout DDR buffer, such as the 93788, it provides all the necessary clock signals for such a system. The IDT952906A is part of a whole new line of IDT clock generators and buffers called TCH™ (Timing Control Hub). This part incorporates IDT's newest clock technology which offers more robust features and functionality. Employing the use of a serially programmable I2C interface, this device can adjust the output clocks by configuring the frequency setting, the output divider ratios, selecting the ideal spread percentage, the output skew, the output strength, and enabling/disabling each individual output clock. M/N control can configure output frequency with resolution up to 0.1MHz increment.

特性 Features

3 - 0.7V current-mode differential CPU pairs
10 - PCI, 3 free running, 33MHz
2 - REF, 14.318MHz
3 - 3V66, 66.66MHz
1 - 48MHz
1 - 24/48MHz
2 - 25MHz @ 2.5V