Description

The 8SLVP1204 is a high-performance differential LVPECL fanout

buffer. The device is designed for the fanout of high-frequency, very

low additive phase-noise clock and data signals. The 8SLVP1204 is

characterized to operate from a 3.3V or 2.5V power supply.

Guaranteed output-to-output and part-to-part skew characteristics

make the 8SLVP1204 ideal for clock distribution applications that

demand well-defined performance and repeatability. Two selectable

differential inputs and four low skew outputs are available. The

integrated bias voltage reference enables easy interfacing of

single-ended signals to the device inputs. The device is optimized for

low power consumption and low additive phase noise.

Features

• Four low skew, low additive jitter LVPECL output pairs

• Two selectable, differential clock input pairs

• Differential PCLKx pairs can accept the following differential input

levels: LVDS, LVPECL, CML

• Differential PCLKx pairs can also accept single-ended LVCMOS

levels. See Applications Information, “Wiring the Differential Input

to Accept Single-Ended Levels” (Figures 1A and 1B)

• Maximum input clock frequency: 2GHz

• LVCMOS interface levels for the control input, (input select)

• Output skew: 5ps (typical), at 3.63V

• Propagation delay: 200ps (typical), at 3.63V

• Low additive phase jitter, RMS; fREF = 156.25MHz, VPP = 1V,

12kHz - 20MHz: 40fs (maximum), at 3.63V

• Maximum device current consumption (IEE): 60mA (maximum),

at 3.63V

• Full 3.3V±5, 3.3V±10 or 2.5V±5 supply

• Lead-free (RoHS 6), 16-Lead VFQFPN packaging

• -40°C to 85°C ambient operating temperature

• Supports case temperature  105°C operations

• Supports PCI Express Gen1–5

8SLVP1204ANLGI属于集成电路（IC） > 时钟缓冲器，驱动器。瑞萨科技有限公司制造生产的8SLVP1204ANLGI时钟缓冲器，驱动器时钟缓冲器和驱动器集成电路产品族中的产品用于帮助信号在系统中传输，常用作频率/时间参考信号，以同步系统内的活动。尽管这些器件最常用到的功能就是缓冲（即，为使信号不受驱动负载的影响而从某个信号源复制信号），但是该产品族中的某些器件还能执行其他功能，例如选择性改变缓冲信号路径、按某个整数值分割信号频率，或进行所用电信号格式转换。