89LPC925数据手册恩XP中文资料规格书

描述 Description

General description
The P89LPC924/925 are single-chip microcontrollers designed for applications demanding high-integration, low cost solutions over a wide range of performance requirements. The P89LPC924/925 is based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC924/925 in order to reduce component count, board space, and system cost.

特性 Features

Principal features
■ 4 kB/8 kB Flash code memory with 1 kB erasable sectors, 64-byte erasable page size, and single byte erase.
■ 256-byte RAM data memory.
■ Two 16-bit counter/timers. Each timer may be configured to toggle a port output upon timer overflow or to become a PWM output.
■ Real-Time clock that can also be used as a system timer.
■ 4-input 8-bit multiplexed A/D converter/single DAC output. Two analog comparators with selectable inputs and reference source.
■ Enhanced UART with fractional baud rate generator, break detect, framing error detection, automatic address detection and versatile interrupt capabilities.
■ 400 kHz byte-wide I2C-bus communication port.
■ Configurable on-chip oscillator with frequency range and RC oscillator options (selected by user programmed Flash configuration bits). The RC oscillator option allows operation without external oscillator components. Oscillator options support frequencies from 20 kHz to the maximum operating frequency of 12 MHz. The RC oscillator option is selectable and fine tunable.
■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).
■ 15 I/O pins minimum. Up to 18 I/O pins while using on-chip oscillator and reset options.Additional features
■ 20-pin TSSOP package.