87321I中文资料÷1/÷2 Differential-to-LVPECL Clock Generator数据手册Renesas规格书

描述 Description

The 87321I is a high performance ÷1, ÷2 Differential-to-LVPECL Clock Generator and a member of the family of High Performance Clock Solutions from IDT. The CLK, nCLK pair can accept most standard differential input levels. The 87321I is characterized to operate from a 3.3V or 2.5V power supply. Guaranteed part-to-part skew characteristics make the 87321I ideal for those clock distribution applications demanding well defined performance and repeatability.

特性 Features

·One differential LVPECL output
·One CLK, nCLK input pair
·CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
·Maximum clock input frequency: 700MHz
·Translates any single ended input signal (LVCMOS, LVTTL, GTL) to LVPECL levels with resistor bias on nCLK input
·Part-to-part skew: 600ps (maximum)
·Propagation delay: 1.8ns (maximum)
·Additive phase Jitter, RMS: 0.18ps
·Full 3.3V or 2.5V operating supply
·-40°C to 85°C ambient operating temperature
·Available in lead-free (RoHS 6) package