丝印：ICS8705BYILF；Package：LQFP；Zero Delay, Differential-to-LVCMOS/ LVTTL Clock Generator

FEATURES • Eight LVCMOS/LVTTL outputs, 7Ω typical output impedance • Selectable CLK1, nCLK1 or LVCMOS/LVTTL clock inputs • CLK1, nCLK1 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • CLK0 input accepts LVCMOS or LVTTL input levels • Output frequenc

文件：478.94 Kbytes 页数：19 Pages

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丝印：ICS8705BYILF；Package：LQFP；Zero Delay, Differential-to-LVCMOS/ LVTTL Clock Generator

FEATURES • Eight LVCMOS/LVTTL outputs, 7Ω typical output impedance • Selectable CLK1, nCLK1 or LVCMOS/LVTTL clock inputs • CLK1, nCLK1 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • CLK0 input accepts LVCMOS or LVTTL input levels • Output frequenc

文件：478.94 Kbytes 页数：19 Pages

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瑞萨

Package：32-LQFP；包装：卷带（TR） 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLOCK GENERATOR ZD 32-LQFP

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6-bit high-speed dual Analog-to-Digital Converter ADC

文件：117.56 Kbytes 页数：16 Pages

PHI

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6-bit high-speed dual Analog-to-Digital Converter ADC

文件：111 Kbytes 页数：16 Pages

PHI

PHI

6-bit high-speed dual Analog-to-Digital Converter ADC

文件：117.56 Kbytes 页数：16 Pages

PHI

PHI