丝印：ICS87016AYLF；Package：LQFP；Low Skew, 1-to-16 LVCMOS/LVTTL Clock Generator

FEATURES • Sixteen LVCMOS/LVTTL outputs (4 banks of 4 outputs) • Selectable differential CLK1, nCLK1 or LVCMOS clock input • CLK1, nCLK1 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • CLK0 supports the following input types: LVCMOS, LVTTL • Maxi

文件：865.7 Kbytes 页数：16 Pages

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丝印：ICS87016AYLF；Package：LQFP；Low Skew LVCMOS/LVTTL Clock Generator

文件：271.26 Kbytes 页数：17 Pages

IDT

Package：48-LQFP；包装：卷带（TR） 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLOCK GENERATOR 1-16 48-LQFP

Renesas Electronics America Inc

Low Skew, 1-to-16 LVCMOS/LVTTL Clock Generator

Features • Sixteen LVCMOS/LVTTL outputs (4 banks of 4 outputs) • Selectable differential CLK1/CLK1 or LVCMOS/LVTTL clock input • CLK1, CLK1 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • CLK0 supports the following input types: LVCMOS, LVTTL • Max

文件：898.68 Kbytes 页数：16 Pages

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Maximum output frequency

文件：383.65 Kbytes 页数：17 Pages

IDT

Low Skew, 1-to-16 LVCMOS/LVTTL Clock Generator

Features • Sixteen LVCMOS/LVTTL outputs (4 banks of 4 outputs) • Selectable differential CLK1/CLK1 or LVCMOS/LVTTL clock input • CLK1, CLK1 pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • CLK0 supports the following input types: LVCMOS, LVTTL • Max

文件：898.68 Kbytes 页数：16 Pages

RENESAS

瑞萨