853S012I中文资料12:1 Differential-to-3.3V,2.5V LVPECL Clock/Data Multiplexer数据手册Renesas规格书

描述 Description

The 853S012I is an 12:1 Differential-to-3.3V or 2.5V LVPECL Clock/Data Multiplexer which can operate up to 3.2GHz. The 853S012I has twelve differential selectable clock inputs. The CLK, nCLK input pairs can accept LVPECL, LVDS or CML levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors.

特性 Features

High speed 12:1 differential multiplexer
One differential 3.3V or 2.5V LVPECL output
Twelve selectable differential clock or data inputs
CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML
Maximum output frequency: 3.2GHz
Translates any single ended input signal to LVPECL levels with resistor bias on nCLKx input
Additive phase jitter, RMS: 0.144ps (typical)
Part-to-part skew: 250ps (maximum)
Propagation delay: 1.15ns (maximum)
Full 3.3V or 2.5V operating supply modes
-40°C to 85°C ambient operating temperature
Available lead-free (RoHS 6) package