12 Bit, 2-to-1, 3.3V, 2.5V LVPECL Clock Buffer

Features • Twelve, 2-to-1 multiplexers with LVPECL outputs • Selectable differential CLKx, nCLKx input pairs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Maximum output frequency: 700MHz • Individual select control for each multiplex

文件：817.87 Kbytes 页数：21 Pages

RENESAS

瑞萨

LVPECL Clock Buffer

文件：358.36 Kbytes 页数：20 Pages

IDT

12 Bit, 2-to-1, 3.3V, 2.5V LVPECL Clock Buffer

Renesas

瑞萨

包装：散装 类别：标签，标志，护栏，标识 标签，贴纸，贴标 - 预印 描述：B302-7X10-WK-T-EYE WASH

Brady Corporation

包装：散装 类别：标签，标志，护栏，标识 标签，贴纸，贴标 - 预印 描述：B302-7X10-WK-T-EYE WASH

Brady Corporation

包装：散装 类别：工具 扳手 描述：WR RAT REV S 3/4X7/8

ATG

丝印：ICS85352AYIL；Package：TQFP；12 Bit, 2-to-1, 3.3V, 2.5V LVPECL Clock Buffer

Features • Twelve, 2-to-1 multiplexers with LVPECL outputs • Selectable differential CLKx, nCLKx input pairs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Maximum output frequency: 700MHz • Individual select control for each multiplex

文件：817.87 Kbytes 页数：21 Pages

RENESAS

瑞萨

丝印：ICS85352AYIL；Package：TQFP；12 Bit, 2-to-1, 3.3V, 2.5V LVPECL Clock Buffer

Features • Twelve, 2-to-1 multiplexers with LVPECL outputs • Selectable differential CLKx, nCLKx input pairs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Maximum output frequency: 700MHz • Individual select control for each multiplex

文件：817.87 Kbytes 页数：21 Pages

RENESAS

瑞萨

丝印：ICS85352AYIL；Package：TQFP；LVPECL Clock Buffer

文件：358.36 Kbytes 页数：20 Pages

IDT

丝印：ICS85352AYIL；Package：TQFP；LVPECL Clock Buffer

文件：358.36 Kbytes 页数：20 Pages

IDT