85310I-21中文资料瑞萨数据手册PDF规格书

FEATURES

• Two differential 2.5V/3.3V LVPECL / ECL bank outputs

• Two differential clock input pairs

• CLKx, nCLKx pairs can accept the following differential

input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL

• Maximum output frequency: 700MHz

• Translates any single ended input signal to 3.3V

LVPECL levels with resistor bias on nCLKx input

• Output skew: 25ps (typical)

• Part-to-part skew: 270ps (typical)

• Propagation delay: 1.7ns (typical)

• Additive phase jitter, RMS: <0.13ps (typical)

• LVPECL mode operating voltage supply range:

VCC = 2.375V to 3.8V, VEE = 0V

• ECL mode operating voltage supply range:

VCC = 0V, VEE = -3.8V to -2.375V

• -40°C to 85°C ambient operating temperature

• Lead-Free package fully RoHS complaint

• For replacement part use 8T39S11A