844S0258CK-07LF中文资料瑞萨数据手册PDF规格书

特性 Features

• Seven LVDS differential output at 125MHz

One LVCMOS/LVTTL single-ended outputs at 125MHz

• Selectable crystal oscillator interface or LVCMOS/LVTTL

single-ended input and PLL bypass from a single select pin

• Output enable signal for three LVDS outputs

• RMS phase jitter @ 125MHz, using a 25MHz crystal

(1.857MHz - 20MHz): 0.278ps (typical)

• PCI Express (2.5Gb/s) and Gen 2 (5 Gb/s) jitter compliant

• Full 3.3V supply mode

• 0°C to 70°C ambient operating temperature

• Lead-free (RoHS 6) packaging