843S304I-100数据手册Renesas中文资料规格书

描述 Description

The 843S304I-100 is a PLL-based clock generator specifically designed for low phase noise applications. This device generates a 100MHz differential LVPECL clock from a input reference of 25MHz. The input reference may be derived from an external source or by the addition of a 25MHz crystal to the on-chip crystal oscillator. An external reference is applied to the PCLK pins. The nominal output frequency of 100MHz may be margined by approximately ±5% by changing the M divider value via the I2C interface. The device offers spread spectrum clock output for reduced EMI applications. An I2C bus interface is used to enable or disable spread spectrum operation as well as set the amount of spread. The 843S304I-100 is available in a lead-free 32-Lead VFQFN package.

特性 Features

Four LVPECL output pairs
Crystal oscillator interface: 25MHz
Output frequency: 100MHz
PCI Express Gen 2 (5 Gb/s) Jitter compliant
RMS phase jitter @ 100MHz (12kHz - 20MHz): 1.01ps (typical)
I2C support with readback capabilities up to 400kHz
Spread Spectrum for electromagnetic interference (EMI) reduction
3.3V operating supply mode
-40°C to 85°C ambient operating temperature
Available in lead-free (RoHS 6) package