HCSL/ LVCMOS Clock Generator

文件：591.9 Kbytes 页数：33 Pages

IDT

HCSL/ LVCMOS Clock Generator

Features • Ten selectable 100MHz and 156.25MHz clocks for PCI Express, sRIO and GbE, HCSL interface levels • One single-ended QF LVCMOS/LVTTL clock output at 50MHz, 15 output impedance • Selectable external crystal or differential (single-ended) input source • Crystal oscillator interface

文件：952.23 Kbytes 页数：30 Pages

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HCSL/ LVCMOS Clock Generator

文件：754.84 Kbytes 页数：29 Pages

IDT

HCSL/LVCMOS Clock Generator

The 8413S12BI is a PLL-based clock generator. This high performance device is optimized to generate the processor core reference clock, the PCI-Express, sRIO, XAUI, SerDes reference clocks and the clocks for both the Gigabit Ethernet MAC and PHY. The clock generator offers ultra low-jitter, low-skew • Ten selectable 100MHz, 125MHz, 156.25MHz and 312.5MHz clocks for PCI Express, sRIO and GbE, HCSL interface levels\n• One single-ended QF LVCMOS/LVTTL clock output at 50MHz, 15 output impedance\n• Selectable external crystal or differential (single-ended) input source\n• Differential CLK, nCLK inpu;

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