8344-01中文资料Low Skew,1-to-24 Differential-to-LVCMOS/LVTTL Fanout Buffer数据手册Renesas规格书

描述 Description

The 8344-01 is a low voltage, low skew fanout buffer and a member of the family of High Performance Clock Solutions from IDT. The 8344-01 has two selectable clock inputs. The CLKx, nCLKx pairs can accept most standard differential input levels. The 8344-01 is designed to translate any differential signal level to LVCMOS/LVTTL levels. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased to 48 by utilizing the ability of the outputs to drive two series terminated lines. Redundant clock applications can make use of the dual clock inputs which also facilitate board level testing. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. The outputs are driven low when disabled. The 8344-01 is characterized at full 3.3V, full 2.5V and mixed 3.3V input and 2.5V output operating supply modes. Guaranteed output and part-to-part skew characteristics make the 8344-01 ideal for those clock distribution applications demanding well defined performance and repeatability.

特性 Features

Twenty-four LVCMOS/LVTTL outputs, 7Ω typical output impedance
Two selectable differential CLKx, nCLKx inputs
CLK0, nCLK0 and CLK1, nCLK1 pairs can accept the following input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
Output frequency up to 250MHz
Translates any single ended input signal to LVCMOS/LVTTL with resistor bias on nCLK input
Synchronous clock enable
Additive phase jitter RMS: 0.21ps (typical)
Output skew: 200ps (maximum)
Part-to-part skew: 900ps (maximum)
Bank skew: 85ps (maximum)
Propagation delay: 5ns (maximum)
Output supply modes:Core/Output3.3V/3.3V2.5V/2.5V3.3V/2.5V
0°C to 70°C ambient operating temperature
Available in lead-free (RoHS 6) package