6:1, Single-Ended Multiplexer

FEATURES • 6:1 single-ended multiplexer • Q nominal output impedance: 7Ω (VDDO= 3.3V) • Maximum output frequency: 250MHz • Propagation delay: 3ns (maximum), VDD= V DDO= 3.3V • Input skew: 225ps (maximum), VDD= VDDO= 3.3V • Part-to-part skew: 475ps (maximum), VDD= VDDO= 3.3V • Additive phase

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Maximum output frequency

文件：167.46 Kbytes 页数：15 Pages

IDT

6:1, Single-Ended Multiplexer

文件：151.77 Kbytes 页数：15 Pages

IDT

6:1, SINGLE-ENDED MULTIPLEXER

GENERAL DESCRIPTION The ICS83056I is a low skew, 6:1, Single-ended Multiplexer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS83056I has six selectable singleended clock inputs and one single-ended clock output. The output has a VDDO pin which may be

文件：157.7 Kbytes 页数：13 Pages

ICST

丝印：ICS83056AI01；Package：TSSOP；6-BIT, 2:1, SINGLE-ENDED LVCMOS MULTIPLEXER

Features • 6-Bit, 2:1 single-ended LVCMOS multiplexer • Maximum output frequency: 250MHz • Additive phase jitter, RMS at 155.52MHz (12kHz - 20MHz): 0.18ps (typical) • Operating supply modes: Core/Output VDD/VDDO 3.3V/3.3V 3.3V/2.5V 3.3V/1.8V 2.5V/2.5V 2.5V/1.8V • -40°C to 85°C ambient

文件：833.56 Kbytes 页数：15 Pages

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丝印：ICS3056AI01L；Package：TSSOP；6-BIT, 2:1, SINGLE-ENDED LVCMOS MULTIPLEXER

Features • 6-Bit, 2:1 single-ended LVCMOS multiplexer • Maximum output frequency: 250MHz • Additive phase jitter, RMS at 155.52MHz (12kHz - 20MHz): 0.18ps (typical) • Operating supply modes: Core/Output VDD/VDDO 3.3V/3.3V 3.3V/2.5V 3.3V/1.8V 2.5V/2.5V 2.5V/1.8V • -40°C to 85°C ambient

文件：833.56 Kbytes 页数：15 Pages

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丝印：ICS3056AI01L；Package：TSSOP；6-BIT, 2:1, SINGLE-ENDED LVCMOS MULTIPLEXER

Features • 6-Bit, 2:1 single-ended LVCMOS multiplexer • Maximum output frequency: 250MHz • Additive phase jitter, RMS at 155.52MHz (12kHz - 20MHz): 0.18ps (typical) • Operating supply modes: Core/Output VDD/VDDO 3.3V/3.3V 3.3V/2.5V 3.3V/1.8V 2.5V/2.5V 2.5V/1.8V • -40°C to 85°C ambient

文件：833.56 Kbytes 页数：15 Pages

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瑞萨

丝印：ICS83056AI01；Package：TSSOP；6-BIT, 2:1, SINGLE-ENDED LVCMOS MULTIPLEXER

Features • 6-Bit, 2:1 single-ended LVCMOS multiplexer • Maximum output frequency: 250MHz • Additive phase jitter, RMS at 155.52MHz (12kHz - 20MHz): 0.18ps (typical) • Operating supply modes: Core/Output VDD/VDDO 3.3V/3.3V 3.3V/2.5V 3.3V/1.8V 2.5V/2.5V 2.5V/1.8V • -40°C to 85°C ambient

文件：833.56 Kbytes 页数：15 Pages

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丝印：83056AIL；Package：TSSOP；6:1, Single-Ended Multiplexer

FEATURES • 6:1 single-ended multiplexer • Q nominal output impedance: 7Ω (VDDO= 3.3V) • Maximum output frequency: 250MHz • Propagation delay: 3ns (maximum), VDD= V DDO= 3.3V • Input skew: 225ps (maximum), VDD= VDDO= 3.3V • Part-to-part skew: 475ps (maximum), VDD= VDDO= 3.3V • Additive phase

文件：346.06 Kbytes 页数：16 Pages

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丝印：83056AIL；Package：TSSOP；6:1, Single-Ended Multiplexer

FEATURES • 6:1 single-ended multiplexer • Q nominal output impedance: 7Ω (VDDO= 3.3V) • Maximum output frequency: 250MHz • Propagation delay: 3ns (maximum), VDD= V DDO= 3.3V • Input skew: 225ps (maximum), VDD= VDDO= 3.3V • Part-to-part skew: 475ps (maximum), VDD= VDDO= 3.3V • Additive phase

文件：346.06 Kbytes 页数：16 Pages

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