82V3011数据手册集成电路(IC)的应用特定时钟/定时规格书PDF

厂商型号 |
82V3011 |
参数属性 | 82V3011 封装/外壳为56-BSSOP(0.295",7.50mm 宽);包装为卷带(TR);类别为集成电路(IC)的应用特定时钟/定时;产品描述:IC PLL WAN T1/E1/OC3 SGL 56-SSOP |
功能描述 | T1/E1/OC3 WAN PLL With Single Reference Input |
封装外壳 | 56-BSSOP(0.295",7.50mm 宽) |
制造商 | Renesas Renesas Technology Corp |
中文名称 | 瑞萨 瑞萨科技有限公司 |
数据手册 | |
更新时间 | 2025-8-8 17:24:00 |
人工找货 | 82V3011价格和库存,欢迎联系客服免费人工找货 |
82V3011规格书详情
描述 Description
The 82V3011 is a T1/E1/OC3 WAN PLL with single reference input. It contains a Digital Phase-Locked Loop (DPLL), which generates low jitter ST-BUS and 19.44 MHz clock and framing signals that are phase locked to an 8 kHz, 1.544 MHz, 2.048 MHz or 19.44 MHz input reference. The 82V3011 provides 9 types of clock signals (C1.5o, C3o, C6o, C2o, C4o, C8o, C16o, C19o, C32o) and 7 types of framing signals (F0o, F8o, F16o, F19o, F32o, RSP, TSP) for multitrunk T1/E1 and STS3/OC3 links. The 82V3011 is compliant with AT&T TR62411, Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4, and ETSI ETS 300 011. It meets the jitter/wander tolerance, jitter/wander transfer, intrinsic jitter/wander, frequency accuracy, capture range, phase change slope, holdover frequency accuracy and MTIE (Maximum Time Interval Error) requirements for these specifications. The 82V3011 can be used in synchronization and timing control for T1, E1 and OC3 systems, or used as ST-BUS clock and frame pulse source. It also can be used in access switch, access routers, ATM edge switches, wireless base station controllers, or IADs (Integrated Access Devices), PBXs, line cards and SONET/SDH equipments.
特性 Features
• Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces
• Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface
• Selectable input reference: 8 kHz, 1.544 MHz, 2.048 MHz or 19.44 MHz
• Provides C1.5o, C3o, C2o, C4o, C6o, C8o, C16o, C19o and C32o output clock signals
• Provides 7 types of 8 kHz framing pulses: F0o, F8o, F16o, F19o, F32o, RSP and TSP
• Provides a C2/C1.5 output clock signal with the frequency controlled by the reference input Fref
• Holdover frequency accuracy of 0.025 ppm
• Phase slope of 5 ns per 125 µs
• Attenuates wander from 2.1 Hz
• Fast lock mode
• Provides Time Interval Error (TIE) correction
• MTIE of 600 ns
• JTAG boundary scan
• Holdover status indication
• Freerun status indication
• Normal status indication
• Lock status indication
• Input reference quality indication
• 3.3 V operation with 5 V tolerant I/O
• Package available: 56-pin SSOP (Green option available)
技术参数
- 产品编号:
82V3011PVG8
- 制造商:
Renesas Electronics America Inc
- 类别:
集成电路(IC) > 应用特定时钟/定时
- 包装:
卷带(TR)
- PLL:
是
- 主要用途:
电信
- 输入:
时钟
- 输出:
CMOS,LVDS,TTL
- 比率 - 输入:
1:12
- 差分 - 输入:
无/是
- 频率 - 最大值:
32.768MHz
- 电压 - 供电:
3V ~ 3.6V
- 工作温度:
-40°C ~ 85°C
- 安装类型:
表面贴装型
- 封装/外壳:
56-BSSOP(0.295",7.50mm 宽)
- 供应商器件封装:
56-SSOP
- 描述:
IC PLL WAN T1/E1/OC3 SGL 56-SSOP
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
IDT |
21+ |
SSOP-56 |
180 |
原装现货假一赔十 |
询价 | ||
IDT |
2023+ |
标准封装 |
8700 |
原装现货 |
询价 | ||
23+ |
SSOP56 |
3000 |
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、 |
询价 | |||
IDT |
18+ |
DIP |
1000 |
原装正品 |
询价 | ||
Renesas |
25+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
询价 | |||
IDT |
24+ |
1000 |
询价 | ||||
82V3012PVG |
229 |
229 |
询价 | ||||
Renesas |
25+ |
电联咨询 |
7800 |
公司现货,提供拆样技术支持 |
询价 | ||
IDT, Integrated Device Technol |
24+ |
56-SSOP |
53200 |
一级代理/放心采购 |
询价 | ||
IDT |
23+ |
SSOP56 |
3295 |
原厂原装正品 |
询价 |