82371SB中文资料英特尔数据手册PDF规格书

The 82371FB (PIIX) and 82371SB (PIIX3) PCI ISA IDE Xcelerators are multi-function PCI devices implementing a PCI-to-ISA bridge function and an PCI IDE function. In addition, the PIIX3 implements a Universal Serial Bus host/hub function. As a PCI-to-ISA bridge, the PIIX/PIIX3 integrates many common I/O functions found in ISA-based PC systems—a seven-channel DMA controller, two 82C59 interrupt controllers, an 8254 timer/counter, and power management support. In addition to compatible transfers, each DMA channel supports type F transfers. Chip select decoding is provided for BIOS, real time clock, and keyboard controller. Edge/Level interrupts and interrupt steering are supported for PCI plug and play compatibility. The PIIX/PIIX3 supports two IDE connectors for up to four IDE devices providing an interface for IDE hard disks and CD ROMs. The PIIX/PIIX3 provides motherboard plug and play compatibility. PIIX implements two steerable DMA channels (including type F transfers) and up to two steerable interrupt lines. PIIX3 implements one steerable interrupt line. The interrupt lines can be routed to any of the available ISA interrupts. Both PIIX/PIIX3 implement a programmable chip select.

PIIX3 contains a Universal Serial Bus (USB) Host Controller that is UHCI compatible. The Host Controller’s root hub has two programmable USB ports. PIIX3 also provides support for an external IOAPIC.

This document describes the PIIX3 Component. Unshaded areas describe the 82371FB PIIX. Shaded areas, like this one, describe the PIIX3 operations that differ from the 82371FB PIIX.

■ Bridge Between the PCI Bus and ISA Bus

■ PCI and ISA Master/Slave Interface

- PCI from 25–33 MHz

- ISA from 7.5–8.33 MHz

- 5 ISA Slots

■ Fast IDE Interface

- Supports PIO and Bus Master IDE

- Supports up to Mode 4 Timings

- Transfer Rates to 22 MB/Sec

- 8 x 32-Bit Buffer for Bus Master IDE PCI Burst Transfers

- Separate Master/Slave IDE Mode Support (PIIX3)

■ Plug-n-Play Port for Motherboard Devices

- 2 Steerable DMA Channels (PIIX Only)

- Fast DMA with 4-Byte Buffer (PIIX Only)

- 2 Steerable Interrupts Lines on the PIIX and 1 Steerable Interrupt Line on the PIIX3

- 1 Programmable Chip Select

■ Steerable PCI Interrupts for PCI Device Plug

■-Play

■ PCI Specification Revision 2.1 Compliant (PIIX3)

■ Functionality of One 82C54 Timer

- System Timer; Refresh Request; Speaker Tone Output

■ Two 82C59 Interrupt Controller Functions

- 14 Interrupts Supported

- Independently Programmable for Edge/Level Sensitivity

■ Enhanced DMA Functions

- Two 8237 DMA Controllers

- Fast Type F DMA

- Compatible DMA Transfers

- 7 Independently Programmable Channels

■ X-Bus Peripheral Support

- Chip Select Decode

- Controls Lower X-Bus Data Byte Transceiver

■ I/O Advanced Programmable Interrupt Controller (IOAPIC) Support (PIIX3)

■ Universal Serial Bus (USB) Host Controller (PIIX3)

- Compatible with Universal Host Controller Interface (UHCI)

- Contains Root Hub with 2 USB Ports

■ System Power Management (Intel SMM Support)

- Programmable System Management Interrupt (SMI)—Hardware Events, Software Events, EXTSMI#

- Programmable CPU Clock Control (STPCLK#)

- Fast On/Off Mode

■ Non-Maskable Interrupts (NMI)

- PCI System Error Reporting

■ NAND Tree for Board-Level ATE Testing

■ 208-Pin QFP