810252BYI-03LF集成电路（IC）的时钟发生器PLL频率合成器规格书PDF中文资料

FEATURES

• Two LVCMOS/LVTTL outputs, 17Ω impedance

Each output supports independent frequency selection at

25MHz, 62.5MHz, 125MHz, and 156.25MHz

• Two differential inputs support the following input types:

LVPECL, LVDS, LVHSTL, SSTL, HCSL

• Accepts input frequencies from 8kHz to 155.52MHz including

8kHz, 1.544MHz, 2.048MHz, 19.44MHz, 25MHz, 77.76MHz,

125MHz and 155.52MHz

• Attenuates the phase jitter of the input clock by using a lowcost

pullable fundamental mode VCXO crystal

• VCXO PLL bandwidth can be optimized for jitter attenuation

and reference tracking using external loop filter connection

• FemtoClock frequency multiplier provides low jitter, high

frequency output

• Absolute pull range: ±50ppm

• FemtoClock VCO frequency: 625MHz

• RMS phase jitter @ 125MHz, using a 25MHz crystal

(12kHz - 20MHz): 1.1ps (typical)

• 3.3V supply voltage

• -40°C to 85°C ambient operating temperature

• Available in lead-free (RoHS 6) package