80960MC中文资料英特尔数据手册PDF规格书

THE i960® MC PROCESSOR

The 80960MC, a member of Intel’s i960® 32-bit processor family, is ideally suited for embedded applications. It includes a 512-byte instruction cache and a built-in interrupt controller. The 80960MC has a large register set, multiple parallel execution units and a high-bandwidth burst bus. Using advanced RISC technology, this processor is capable of execution rates in excess of 9.4 million instructions per second*.

■ High-Performance Embedded Architecture

— 25 MIPS Burst Execution at 25 MHz

— 9.4 MIPS* Sustained Execution at 25 MHz

■ On-Chip Floating Point Unit

— Supports IEEE 754 Floating Point Standard

— Full Transcendental Support

— Four 80-Bit Registers

— 13.6 Million Whetstones/s (Single Precision) at 25 MHz

■ 512-Byte On-Chip Instruction Cache

— Direct Mapped

— Parallel Load/Decode for Uncached Instructions

■ Multiple Register Sets

— Sixteen Global 32-Bit Registers

— Sixteen Local 32-Bit Registers

— Four Local Register Sets Stored On-Chip (Sixteen 32-Bit Registers per Set)

— Register Scoreboarding

■ On-Chip Memory Management Unit

— 4 Gbyte Virtual Address Space per Task

— 4 Kbyte Pages with Supervisor/User Protection

■ Built-in Interrupt Controller

— 32 Priority Levels

— 248 Vectors

— Supports M8259A

— 3.4 µs Latency @ 25 MHz

■ Easy to Use, High Bandwidth 32-Bit Bus

— 66.7 Mbytes/s Burst

— Up to 16 Bytes Transferred per Burst

■ Multitasking and Multiprocessor Support

— Automatic Task dispatching

— Prioritized Task Queues

■ Advanced Package Technology

— 132-Lead Ceramic Pin Grid Array