7C136-35中文资料2Kx8 Dual-Port Static RAM数据手册Infineon规格书

描述 Description

Functional Description
The CY7C132/CY7C136/CY7C142 and CY7C146 are high-speed CMOS 2K by 8 dual-port static RAMs. Two ports are provided to permit independent access to any location in memory. The CY7C132/ CY7C136 can be utilized as either a standalone 8-bit dual-port static RAM or as a MASTER dual-port RAM in conjunction with the CY7C142/CY7C146 SLAVE dual-port device in systems requiring 16-bit or greater word widths. It is the solution to applications requiring shared or buffered data such as cache memory for DSP, bit-slice, or multiprocessor designs.

特性 Features

• True Dual-Ported memory cells which allow simultaneous reads of the same memory location
• 2K x 8 organization
• 0.65-micron CMOS for optimum speed/power
• High-speed access: 15 ns
• Low operating power: ICC = 90 mA (max.)
• Fully asynchronous operation
• Automatic power-down
• Master CY7C132/CY7C136 easily expands data bus width to 16 or more bits using slave CY7C142/CY7C146
• BUSY output flag on CY7C132/CY7C136; BUSY input on CY7C142/CY7C146
• INT flag for port-to-port communication (52-pin PLCC/PQFP versions)
• Available in 48-pin DIP (CY7C132/142), 52-pin PLCC and 52-pin TQFP (CY7C136/146)
• Pin-compatible and functionally equivalent to IDT7132/IDT7142