74VHC9363FT中文资料东芝数据手册PDF规格书

Functional Description

• Dual 3-bit Schmitt trigger Buffer

74VHC9363FT:With pull-down resistor at data input terminal

74VHC9364FT:With pull-up resistor at data input terminal

General

The 74VHC9363, 74VHC9364 are an advanced high speed CMOS Hex SCHMITT BUFFERs fabricated with

silicon gate C2MOS technology.

These are fit for use interface between microcomputer to IPU (Integrated Power Unit) at the three-phase inverter

circuit, because it consists of two of 3-bit schmitt trigger buffer circuits which is controlled by three of control

Inputs / Gxn(s).

Since outputs level can be fixed L level for 74VHC9363 and H level for 74VHC9364 when to disabling of output

terminal with the control input which received the fail signal, it compared with the pull-down / pull-up resistor

normally used, it is less affected by ambient noise and contributes to the improvement of motor operation control

accuracy of IPU (Integrated Power Unit).

Each data input terminal Dxn and control terminal / Gxn has a built-in pull-up resistor or pull-down resistor,

it's can fixed output level even when the input is open.

Description of terminal name: x is H or L, N is 1 to 3.

特性 Features

(1) High speed: tpd = 5.0 ns (typ.) at VCC = 5.0 V

(2) Wide operating temperature range: Topr = -40 to 125 

(3) Low power dissipation: ICC = 4.0 μA (max) at Ta = 25 

(4) Power-down protection is provided on all inputs.

(5) Balanced propagation delays: tPLH ≈ tPHL

(6) Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V

(7) Low noise: VOLP = 1.0 V (max)