74VHC161FT中文资料东芝数据手册PDF规格书

Functional Description

• Synchronous Presettable 4-Bit Counter

74VHC161FT: Binary , Asynchronous Clear

74VHC163FT: Binary , Synchronous Clear

General

The 74VHC161FT and 74VHC163FT are advanced high speed CMOS SYNCHRONOUS PRESETTABLE 4 BIT

BINARY COUNTERs fabricated with silicon gate C2MOS technology.

They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS

low power dissipation.

The CK input is active on the rising edge. Both LOAD and CLR inputs are active on low logic level.

Presetting of each IC's is synchronous to the rising edge of CK.

The clear function of the 74VHC163FT is synchronous to CK, while the 74VHC161FT are cleared asynchronously.

Two enable inputs (ENP and ENT) and CARRY OUTPUT are provided to enable easy cascading of counters,

which facilitates easy implementation of n-bit counters without using external gates.

An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply

voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.

This circuit prevents device destruction due to mismatched supply and input voltages

特性 Features

(1) AEC-Q100 (Rev. H) (Note 1)

(2) Wide operating temperature range: Topr = -40 to 125 

(3) High speed: fMAX = 185 MHz (typ.) at VCC = 5 V

(4) Low power dissipation: ICC = 4.0 μA (max) at Ta = 25 

(5) High noise immunity: VNIH = VNIL = 28 VCC (min)

(6) Power-down protection is provided on all inputs.

(7) Balanced propagation delays: tPLH ≈ tPHL

(8) Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V

(9) Low noise: VOLP=0.8 V (max)

(10) Pin and function compatible with 74 series (AC/HC/AHC/LV etc.) 161 or 163 type.