74VCX162827数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

General Description
The VCX162827 contains twenty non-inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is byte controlled. Each byte has NOR output enables for maximum control flexibility. The 74VCX162827 is designed for low voltage (1.4V to 3.6V) VCC applications with I/O capability up to 3.6V. The VCX162827 is also designed with 26Ω resistors in the outputs. The 74VCX162827 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.

特性 Features

■ 1.4V–3.6V VCC supply operation
■ 3.6V tolerant inputs and outputs
■ 26Ω series resistors in outputs
■ tPD 3.4 ns max for 3.0V to 3.6V VCC
■ Power-off high impedance inputs and outputs
■ Supports live insertion and withdrawal (Note 1)
■ Static Drive (IOH/IOL)
   ±12 mA @ 3.0V VCC
■ Uses patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 300 mA
■ ESD performance:
  Human body model 2000V
  Machine model 200V

简介

74VCX162827属于集成电路（IC）的缓冲器驱动器接收器收发器。由制造生产的74VCX162827缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。