DESCRIPTION

The 74V1T125 is an advanced high-speed CMOS SINGLE BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

3-STATE control input G has to be set HIGH to place the output into the high impedance state.

Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

■ HIGH SPEED: tPD = 3.5ns (TYP.) at VCC = 5V

■ LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C

■ COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX)

■ POWER DOWN PROTECTION ON INPUTS

■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V

■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL

■ OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V

74V1T125S属于集成电路（IC） > 缓冲器，驱动器，接收器，收发器。意法半导体（ST）集团制造生产的74V1T125S缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。