74LVX240数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

Octal Bus Buffer
Inverting With 5V−Tolerant InputsThe MC74LVX240 is an advanced high speed CMOS inverting 3−state octal bus buffer and has two active low output enables. It is also designed to work with 3−state memory address drivers, etc. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems.

特性 Features

• High Speed: tPD = 4.3 ns (Typ) at VCC = 3.3 V
• Low Power Dissipation: ICC = 4 μA (Max) at TA = 25°C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Low Noise: VOLP = 0.8 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance:
   Human Body Model 2000 V;
   Machine Model 200 V
• Pb−Free Packages are Available*

简介

74LVX240属于集成电路（IC）的缓冲器驱动器接收器收发器。由制造生产的74LVX240缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。