Low Voltage Quad 2-Input AND Gate

Description The LVX08 contains four 2-input AND gates. The inputs tolerate voltages up to 7 V allowing the interface of 5 V systems to 3 V systems. Features • Input Voltage Level Translation from 5 V to 3 V • Ideal for Low-power / Low-Noise 3.3 V Applications • Guaranteed Simultaneous Switchi

文件：62.52 Kbytes 页数：6 Pages

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LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE WITH 5V TOLERANT INPUTS

DESCRIPTION The 74LVX08 is a low voltage CMOS QUAD 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. The internal circuit is composed of 2 stages including buffer o

文件：163.83 Kbytes 页数：8 Pages

STMICROELECTRONICS

意法半导体

Low Voltage Quad 2-Input AND Gate

Description The LVX08 contains four 2-input AND gates. The inputs tolerate voltages up to 7 V allowing the interface of 5 V systems to 3 V systems. Features • Input Voltage Level Translation from 5 V to 3 V • Ideal for Low-power / Low-Noise 3.3 V Applications • Guaranteed Simultaneous Switchi

文件：62.52 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

Low Voltage Quad 2-Input AND Gate

Description The LVX08 contains four 2-input AND gates. The inputs tolerate voltages up to 7 V allowing the interface of 5 V systems to 3 V systems. Features • Input Voltage Level Translation from 5 V to 3 V • Ideal for Low-power / Low-Noise 3.3 V Applications • Guaranteed Simultaneous Switchi

文件：62.52 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE WITH 5V TOLERANT INPUTS

DESCRIPTION The 74LVX08 is a low voltage CMOS QUAD 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. The internal circuit is composed of 2 stages including buffer o

文件：163.83 Kbytes 页数：8 Pages

STMICROELECTRONICS

意法半导体

Low Voltage Quad 2-Input AND Gate

Description The LVX08 contains four 2-input AND gates. The inputs tolerate voltages up to 7 V allowing the interface of 5 V systems to 3 V systems. Features • Input Voltage Level Translation from 5 V to 3 V • Ideal for Low-power / Low-Noise 3.3 V Applications • Guaranteed Simultaneous Switchi

文件：62.52 Kbytes 页数：6 Pages

FAIRCHILD

仙童半导体

LOW VOLTAGE CMOS QUAD 2-INPUT AND GATE WITH 5V TOLERANT INPUTS

DESCRIPTION The 74LVX08 is a low voltage CMOS QUAD 2-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. The internal circuit is composed of 2 stages including buffer o

文件：163.83 Kbytes 页数：8 Pages

STMICROELECTRONICS

意法半导体

Low Voltage Dual J-K Flip-Flops with Preset and Clear

General Description The LVX112 is a dual J-K Flip-Flop where each flip-flop has independent inputs (J, K, PRESET, CLEAR, and CLOCK) and outputs (Q, Q). These devices are edge sensitive and change states synchronously on the negative going transition of the clock pulse. Triggering occurs at a volt

文件：77.72 Kbytes 页数：7 Pages

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仙童半导体

Low Voltage Dual J-K Flip-Flops with Preset and Clear

General Description The LVX112 is a dual J-K Flip-Flop where each flip-flop has independent inputs (J, K, PRESET, CLEAR, and CLOCK) and outputs (Q, Q). These devices are edge sensitive and change states synchronously on the negative going transition of the clock pulse. Triggering occurs at a volt

文件：77.72 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体

Low Voltage Dual J-K Flip-Flops with Preset and Clear

General Description The LVX112 is a dual J-K Flip-Flop where each flip-flop has independent inputs (J, K, PRESET, CLEAR, and CLOCK) and outputs (Q, Q). These devices are edge sensitive and change states synchronously on the negative going transition of the clock pulse. Triggering occurs at a volt

文件：77.72 Kbytes 页数：7 Pages

FAIRCHILD

仙童半导体