74LVTH652MTC集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

General Description

The LVTH652 consists of bus transceiver circuits with D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to HIGH logic level. Output Enable pins (OEAB, OEBA) are provided to control the transceiver function. (See Functional Description).

The LVTH652 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.

This octal transceiver/register is designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVTH652 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation.

特性 Features

■ Input and output interface capability to systems at 5V VCC

■ Bushold data inputs eliminate the need for external

pull-up resistors to hold unused inputs

■ Live insertion/extraction permitted

■ Power Up/Down high impedance provides glitch-free bus loading

■ Outputs source/sink −32 mA/+64 mA

■ Functionally compatible with the 74 series 652

■ Latch-up performance exceeds 500 mA