1. General description

The 74LVT16374A; 74LVTH16374A is a 16-bit edge-triggered D-type flip-flop with 3-state outputs.

The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. The device features two clocks

(1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8-bits. The flip-flops

will store the state of their individual D-inputs that meet the set-up and hold time requirements

on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOE causes the outputs to assume a

high-impedance OFF-state. Operation of the nOE input does not affect the state of the flip-flops.

2. Features and benefits

• 16-bit edge-triggered flip-flop

• 3-state buffers

• Output capability: +64 mA and -32 mA

• Wide supply voltage range from 2.7 to 3.6 V

• Overvoltage tolerant inputs to 5.5 V

• BiCMOS high speed and output drive

• Direct interface with TTL levels

• Input and output interface capability to systems at 5 V supply

• Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs.

(74LVTH16374A only)

• Live insertion and extraction permitted

• Power-up reset

• Power-up 3-state

• No bus current loading when output is tied to 5 V bus

• IOFF circuitry provides partial Power-down mode operation

• Latch-up performance exceeds 500 mA per JESD 78 Class II Level B

• Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V

• Specified from -40 °C to 85 °C

74LVTH16374ADGG属于集成电路（IC） > 触发器。安世半导体(中国)有限公司制造生产的74LVTH16374ADGG触发器触发器是能够存储单个逻辑状态或信息“位”的基本数字存储器件。这些器件至少有两个输入；一个或多个用于传递要存储的数据，另一个用于指示存储该数据的时间点。不同的触发器类型，例如 D（延迟）、SR（置位复位）和 JK，对提供给其输入的信号有不同的响应，可用于实现不同的逻辑功能。这些器件与锁存器的不同之处在于它们是边缘敏感器件，其保持的逻辑状态仅在接收到有效时钟信号时才会改变。