74LVTH16240MTD集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

General Description

The LVT16240 and LVTH16240 contain sixteen inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/receiver. The device is nibble controlled.

Individual 3-STATE control inputs can be shorted together for 8-bit or 16-bit operation.

The LVTH16240 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.

These buffers and line drivers are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT16240 and LVTH16240 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation.

特性 Features

■ Input and output interface capability to systems at 5V VCC

■ Bushold data inputs eliminate the need for external

pull-up resistors to hold unused inputs (74LVTH16240),

also available without bushold feature (74LVT16240)

■ Live insertion/extraction permitted

■ Power Up/Down high impedance provides glitch-free bus loading

■ Outputs source/sink -32 mA/+64 mA

■ Functionally compatible with the 74 series 16240

■ Latch-up performance exceeds 500 mA

■ ESD performance:

Human-body model > 2000V

Machine model > 200V

Charged-device model > 1000V