74LVTH162240MTD集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

General Description

The LVT162240 and LVTH162240 contain sixteen inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Individual 3-STATE control inputs can be shorted together for 8-bit or 16-bit operation.

特性 Features

■ Input and output interface capability to systems at 5V VCC

■ Outputs include equivalent series resistance of 25: to make external termination resistors unnecessary and reduce overshoot and undershoot

■ Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH162240), also available without bushold feature (74LVT162240)

■ Live insertion/extraction permitted

■ Power Up/Down high impedance provides glitch-free bus loading

■ Functionally compatible with the 74 series 162240

■ Latch-up performance exceeds 500 mA

■ ESD performance:

Human-body model > 2000V

Machine model > 200V

Charged-device model > 1000V