Quad 2-input EXCLUSIVE-OR gate

DESCRIPTION The 74LVC86 is a high-performance, low-power, low-voltage Si-gate CMOS device that is pin and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5

文件：116.71 Kbytes 页数：9 Pages

PHI

飞利浦

Quad 2-input EXCLUSIVE-OR gate

DESCRIPTION The 74LVC86 is a high-performance, low-power, low-voltage Si-gate CMOS device that is pin and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5

文件：116.71 Kbytes 页数：9 Pages

PHI

飞利浦

Quad 2-input EXCLUSIVE-OR gate

DESCRIPTION The 74LVC86 is a high-performance, low-power, low-voltage Si-gate CMOS device that is pin and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5

文件：116.71 Kbytes 页数：9 Pages

PHI

飞利浦

Quad 2-input EXCLUSIVE-OR gate

DESCRIPTION The 74LVC86 is a high-performance, low-power, low-voltage Si-gate CMOS device that is pin and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5

文件：116.71 Kbytes 页数：9 Pages

PHI

飞利浦

Quad 2-input EXCLUSIVE-OR gate

DESCRIPTION The 74LVC86 is a high-performance, low-power, low-voltage Si-gate CMOS device that is pin and superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V/5

文件：116.71 Kbytes 页数：9 Pages

PHI

飞利浦