General description

The 74LVC821A is a 10-bit D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. A clock input (pin CP) and an output enable input (pin OE) are common to all flip-flops. The ten flip-flops store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition. When pin OE is LOW, the contents of the ten flip-flops are available at the outputs.

Features and benefits

● 5 V tolerant inputs and outputs; for interfacing with 5 V logic

● Wide supply voltage range from 1.2 V to 3.6 V

● CMOS low power consumption

● Direct interface with TTL levels

● Flow-through pinout architecture

● 10-bit positive edge-triggered register

● Independent register and 3-state buffer operation

● Complies with JEDEC standard:

◆ JESD8-7A (1.65 V to 1.95 V)

◆ JESD8-5A (2.3 V to 2.7 V)

◆ JESD8-C/JESD36 (2.7 V to 3.6 V)

● ESD protection:

◆ HBM JESD22-A114F exceeds 2000 V

◆ MM JESD22-A115-B exceeds 200 V

◆ CDM JESD22-C101E exceeds 1000 V

● Specified from -40℃ to +85℃ and -40℃ to +125℃.

74LVC821AD属于集成电路（IC） > 触发器。恩智浦半导体公司制造生产的74LVC821AD触发器触发器是能够存储单个逻辑状态或信息“位”的基本数字存储器件。这些器件至少有两个输入；一个或多个用于传递要存储的数据，另一个用于指示存储该数据的时间点。不同的触发器类型，例如 D（延迟）、SR（置位复位）和 JK，对提供给其输入的信号有不同的响应，可用于实现不同的逻辑功能。这些器件与锁存器的不同之处在于它们是边缘敏感器件，其保持的逻辑状态仅在接收到有效时钟信号时才会改变。