1. General description

The 74LVC3G14 provides three inverting buffers with Schmitt trigger input. It is capable of

transforming slowly changing input signals into sharply defined, jitter-free output signals.

The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device

in a mixed 3.3 V and 5 V environment. Schmitt trigger action at the inputs makes the circuit tolerant

of slower input rise and fall time. This device is fully specified for partial power-down applications

using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current

through the device when it is powered down.

2. Features and benefits

• Wide supply voltage range from 1.65 V to 5.5 V

• 5 V tolerant input/output for interfacing with 5 V logic

• High noise immunity

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-A exceeds 200 V

• ±24 mA output drive (VCC = 3.0 V)

• CMOS low power consumption

• Latch-up performance exceeds 250 mA

• Direct interface with TTL levels

• Unlimited rise and fall times

• Multiple package options

• Specified from -40 °C to +85 °C and -40 °C to +125 °C.

3. Applications

• Wave and pulse shaper for highly noisy environment

• Astable multivibrator

• Monostable multivibrator.

74LVC3G14DP属于集成电路（IC） > 门和反相器。安世半导体(中国)有限公司制造生产的74LVC3G14DP门和反相器逻辑栅极和逆变器系列中的产品对单个逻辑信号执行基本逻辑运算（例如 AND、NOT、OR 等）。与触发器不同，它们不能够存储信息，不会对提供给其输入的信号立即做出响应。虽然早就被集成电路实施形式所取代，以用于实现复杂功能，但分立栅极仍可在仅需要非常简单逻辑功能的情况下使用。