Quad 2-input NAND gate (open drain)

DESCRIPTION The 74LVC38A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5 V tolerant inputs for interfacing with 5 V logic • Wide supply voltage range from 1.2 to 3.6 V • CMOS low power consumption •

文件：99.45 Kbytes 页数：14 Pages

PHI

飞利浦

Quad 2-input NAND gate (open drain)

DESCRIPTION The 74LVC38A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5 V tolerant inputs for interfacing with 5 V logic • Wide supply voltage range from 1.2 to 3.6 V • CMOS low power consumption •

文件：99.45 Kbytes 页数：14 Pages

PHI

飞利浦

Quad 2-input NAND gate (open drain)

DESCRIPTION The 74LVC38A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5 V tolerant inputs for interfacing with 5 V logic • Wide supply voltage range from 1.2 to 3.6 V • CMOS low power consumption •

文件：99.45 Kbytes 页数：14 Pages

PHI

飞利浦

Quad 2-input NAND gate (open drain)

DESCRIPTION The 74LVC38A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5 V tolerant inputs for interfacing with 5 V logic • Wide supply voltage range from 1.2 to 3.6 V • CMOS low power consumption •

文件：99.45 Kbytes 页数：14 Pages

PHI

飞利浦

Quad 2-input NAND gate (open drain)

DESCRIPTION The 74LVC38A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. FEATURES • 5 V tolerant inputs for interfacing with 5 V logic • Wide supply voltage range from 1.2 to 3.6 V • CMOS low power consumption •

文件：99.45 Kbytes 页数：14 Pages

PHI

飞利浦