74LVC245ABQ集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF中文资料

1. General description

The 74LVC245A; 74LVCH245A is an 8-bit transceiver with 3-state outputs. The device features an

output enable (OE) and send/receive (DIR) for direction control. A HIGH on OE causes the outputs

to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This

feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry

disables the output, preventing the potentially damaging backflow current through the device when

it is powered down.

2. Features and benefits

• Wide supply voltage range from 1.2 V to 3.6 V

• CMOS low-power consumption

• Direct interface with TTL levels

• Overvoltage tolerant inputs to 5.5 V

• Bus hold on all data inputs (74LVCH245A only)

• IOFF circuitry provides partial Power-down mode operation

• Complies with JEDEC standard:

• JESD8-7A (1.65 V to 1.95 V)

• JESD8-5A (2.3 V to 2.7 V)

• JESD8-C/JESD36 (2.7 V to 3.6 V)

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115B exceeds 200 V

• CDM JESD22-C101E exceeds 1000 V

• Specified from -40 °C to +85 °C and -40 °C to +125 °C