74LVC2245APW数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

The 74LVC2245A is a octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions.
A send/receive (DIR) input controls direction, and an output enable (OE) input makes easy cascading possible. Pin OE controls the outputs so that the buses are effectively isolated.
It is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.
The device is designed with 30 Ω series termination resistors in both HIGH and LOW output stages to reduce line noise.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V applications.

特性 Features

• 5 V tolerant inputs/outputs, for interfacing with 5 V logic
• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low-power consumption
• Direct interface with TTL levels
• Integrated 30 Ω termination resistors
• Complies with JEDEC standard:
• JESD8-7A (1.65 V to 1.95 V)
• JESD8-5A (2.3 V to 2.7 V)
• JESD8-C/JESD36 (2.7 V to 3.6 V)

• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115B exceeds 200 V
• CDM JESD22-C101E exceeds 1000 V

• Specified from -40 °C to +85 °C and -40 °C to +125 °C