74LVC16374ABQ中文资料恩XP数据手册PDF规格书

General description

The 74LVC16374A and 74LVCH16374A are 16-bit edge-triggered flip-flops featuring separate D-type inputs with bus hold (74LVCH16374A only) for each flip-flop and 3-state outputs for bus oriented applications. It consists of two sections of eight positive edge-triggered flip-flops. A clock input (nCP) and an output enable (nOE) are provided for each octal.

Features and benefits

■ 5 V tolerant inputs/outputs for interfacing with 5 V logic

■ Wide supply voltage range from 1.2 V to 3.6 V

■ CMOS low power consumption

■ Multibyte flow-through standard pin-out architecture

■ Low inductance multiple supply pins for minimum noise and ground bounce

■ Direct interface with TTL levels

■ All data inputs have bus hold (74LVCH16374A only)

■ High-impedance outputs when VCC = 0 V

■ Complies with JEDEC standard JESD8-B/JESD36

■ ESD protection:

◆ HBM JESD22-A114F exceeds 2000 V

◆ CDM JESD22-C101D exceeds 1000 V

■ Specified from −40 °C to +85 °C and −40 °C to +125 °C